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LTC4311 Low Voltage I2C/SMBus Accelerator FEATURES

DESCRIPTION
The LTC(R)4311 is a dual I2C active pull-up designed to enhance data transmission speed and reliability for bus loading conditions well beyond the 400pF I2C specification limit. The LTC4311 operates at supply voltages from 1.6V to 5.5V and is also compatible with SMBus. The LTC4311 allows multiple device connections or a longer, more capacitive interconnect, without compromising slew rates or bus performance, by using two slew limited pull-up currents. During positive bus transitions, the LTC4311 provides slew limited pull-up currents to quickly slew the I2C or SMBus lines to the bus pull-up voltage. During negative transitions or steady DC levels, the currents are disabled to improve negative slew rate, and improve low state noise margins. An auto detect standby mode reduces supply current if both SCL and SDA are high. When disabled, the LTC4311 goes into low (<5A) current shutdown. The LTC4311 is available in the 2mm x 2mm x 0.75mm DFN, and SC70 packages.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6356140 and 6650174.

Improves I2C Bus Rise Time Transition Ensures Data Integrity with Multiple Devices on the I2C Bus. Wide Supply Voltage Range: 1.6V to 5.5V Improves Low State Noise Margin Up to 400kHz Operation Auto Detect Low Power Standby Mode Low (<5A) Supply Current Shutdown Does Not Load Bus When Disabled or Powered Down Strong Slew Limited Pull-up Current 8kV Human Body Model ESD Ruggedness 2mm x 2mm DFN and SC70 Packages
APPLICATIONS

Notebook and Palmtop Computers Portable Instruments Battery Chargers Industrial Controls TV/Video Products ACPI SMBus Interface
TYPICAL APPLICATION
VCC 2.5V VCC C1 0.01F ENABLE GND I2C SCL SDA CLK IN CLK OUT DEVICE 1 DATA IN DATA OUT CLK IN CLK OUT DEVICE N
4311 TA01a
LTC4311 BUS1
VCC 2.5V
Comparison of I2C Waveforms for the LTC4311 vs Resistor Pull-Up
10k BUS2
10k
1V/DIV
LTC4311
DATA IN DATA OUT VCC = 5V CLD = 200pF fI2C = 100kHz
RPULL-UP = 15.8k
1s/DIV
4311 TA01b
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LTC4311 ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
VCC to GND .................................................... - 0.3 to 6V BUS1, BUS2, ENABLE Inputs ......................... - 0.3 to 6V Operating Temperature LTC4311C ................................................ 0C to 70C LTC4311I..............................................- 40C to 85C
Storage Temperature Range (DFN) ........- 65C to 125C Storage Temperature Range (SC70).......- 65C to 125C Lead Temperature (Soldering 10, sec) SC70 ............................................................ 300C
PIN CONFIGURATION
TOP VIEW TOP VIEW ENABLE 1 NC 2 VCC 3 7 6 GND 5 BUS2 4 BUS1 VCC 1 GND 2 ENABLE 3 6 BUS1 5 GND 4 BUS2
DFN PACKAGE 6-LEAD (2mm 2mm) PLASTIC DFN TJMAX = 125C, JA = 102C/W EXPOSED PAD (PIN 7) PCB CONNECTION TO GND IS OPTIONAL (Note 3)
SC70 PACKAGE 6-LEAD PLASTIC SC70 TJMAX = 125C, JA = 150 C/W
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE 0C to 70C -40C to 85C 0C to 70C -40C to 85C LTC4311CDC#TRMPBF LTC4311CDC#TRPBF LCNG 6-Lead (2mm x 2mm) Plastic DFN LTC4311IDC#TRMPBF LTC4311IDC#TRPBF LCNG 6-Lead (2mm x 2mm) Plastic DFN LTC4311CSC6#TRMPBF LTC4311CSC6#TRPBF LCNF 6-Lead (2mm x 2mm) Plastic SC70 LTC4311ISC6#TRMPBF LTC4311ISC6#TRPBF LCNF 6-Lead (2mm x 2mm) Plastic SC70 TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LTC4311 ELECTRICAL CHARACTERISTICS *
SYMBOL VCC ICC PARAMETER Positive Supply Voltage Supply Current VCC = 5.5V, ENABLE = 5.5V, VBUS1 = VBUS2 = 0V VCC = 5.5V, ENABLE = 5.5V, VBUS1 = VBUS2 = 5.5V VCC = 5.5V, ENABLE = 0V, VBUS1 = VBUS2 = 5.5V Positive Transition on Bus, Slew Rate = 0.5V/s VCC = 1.8V, BUS > VTHR VCC = 0V, VBUS1 = VBUS2 = 5.5V VCC = 0V, VENABLE = 5.5V VCC = 1.8V VCC = 2.5V VCC = 2.7V to 5.5V VTHR_ENABLE ENABLE Threshold Voltage SRTHRESH tr fMAX Slew Rate Detector Threshold Fast Mode I2C Bus Rise Time Bus Maximum Operating Frequency VCC = 1.6V, 5.5V BUS > VTHR, VCC = 1.8V, 5.5V Bus Capacitance = 400pF VCC = 3V (Note 4) , (Note 5)
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 3.3V, unless otherwise noted.
CONDITIONS

MIN 1.6
TYP 200 26
MAX 5.5 300 45 5
UNITS V A A A mA
ICC_STANDBY Supply Current, Standby Mode ICC_DISABLED Supply Current, Disabled IPULLUPAC IBUS(IN) IENABLE(IN) VTHR Transient Boosted Pull-up Current BUS1,BUS2, Input Leakage Current ENABLE Input Leakage Current Bus Input Threshold Voltage
2.5
5 5 10
A A V V V V V/s ns kHz
0.45 0.65 0.68 0.4
0.55 0.75 0.78 1 0.2
0.65 0.85 0.88 1.5 0.5 300
400
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into pins are positive. All voltages are referenced to GND unless otherwise specified. Note 3: Thermal characteristics are determined with exposed pad soldered to GND plane. If the exposed pad is left open, thermal characteristics can be drastically different.
Note 4: The rise time of an I2C bus line is calculated from VIL(MAX) to VIH(MIN) or 0.9V to 2.1V (with VCC = 3V). This parameter is guaranteed by design and not tested. With a minimum boosted pull-up current of 2.5mA: Rise Time = (2.1V - 0.9V) * 400pF/2.5mA = 0.19s. Note 5: Determined by design, not tested in production.
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LTC4311 TYPICAL PERFORMANCE CHARACTERISTICS
Boost Pull-Up Current vs Temperature
40 BOOST PULL-UP CURRENT (mA) BOOST PULL-UP CURRENT (mA) 35 30 25 20 15 10 5 VCC = 3.3V VCC = 2.5V VCC = 1.8V 0 60 40 20 TEMPERATURE (C) 80 100
4311 G01
(TA = 25C, unless otherwise indicated) Boost Pull-Up Current vs Bus Capacitance
60 Rp = 2k VCC = 5.5V 50 40 30 VCC = 3.3V 20 VCC = 2.5V 10 VCC = 1.8V 0 0 1000 2000 3000 4000 CAPACITANCE (pF) 5000
4311 G02
RP = 4.7k CBUS = 1nF VCC = 5.5V
0 -40 -20
Supply Current vs Temperature
210 200 SUPPLY CURRENT (A) 190 180 170 160 150 140 VCC = 1.8V 0 60 40 20 TEMPERATURE (C) 80 100
4311 G03
Rise Time vs Capacitance
300 VCC = 1.8V 250 VCC = 3.3V RISE TIME (ns) VCC = 2.5V
VCC = 5.5V
VCC = 3.3V
BUS1 = BUS2 = 0V
200 150 VCC = 5.5V 100 50 0 0 1000 2000 3000 4000 CAPACITANCE (pF) 5000
4311 G04
VCC = 2.5V
RP = 2k Measured from 0.3 * VCC to 0.7 * VCC
130 -40 -20
Standby Current vs Temperature
30 28 STANDBY CURRENT (A) 26 24 22 20 18 VCC = 1.8V 16 -40 -20 40 20 60 0 TEMPERATURE (C) 80 100
4311 G05
Bus Input Threshold Voltage vs Supply Voltage
0.8 0.75
VCC = 5.5V
INPUT THRESHOLD (V) VCC = 2.5V
0.7 0.65 0.6 0.55 0.5 0.45 0.4 1 2 3 4 SUPPLY VOLTAGE (V) 5 6
4311 G06
VCC = 3.3V
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LTC4311 PIN FUNCTIONS
BUS1: Active Pull-up for Bus. Connect to either clock line or data line for 2-wire bus. BUS2: Active Pull-up for Bus. Connect to either clock line or data line for 2-wire bus. ENABLE: Device Enable Input. This is a 1V nominal digital threshold input pin. For normal operation drive ENABLE to a voltage greater than 1.5V. Driving ENABLE below the 0.4V threshold puts the device in a low (<5A) current shutdown mode and puts the BUS pins in a high impedance state. If unused, connect to VCC. EXPOSED PAD (DFN Package Only): Exposed Pad may be left open or connected to device ground. GND: Device Ground. Connect this pin to a ground plane for best results. VCC: Supply Voltage Input. Connect this pin to bus supply and place a bypass capacitor of at least 0.01F close to VCC for best results.
BLOCK DIAGRAM
5mA
BUS1 SLEW RATE DETECTOR
VCC
5mA
BUS2 SLEW RATE DETECTOR
+
VTHR
- +
CONTROL LOGIC AND INTERNAL SLEW COMPARATOR
VTHR
- +
VCC - 0.4
- +
VCC - 0.4
- +
1V GND
ENABLE
-
4311 BD
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LTC4311 OPERATION
I2C and SMBus Overview The I2C communication protocol employs open-drain pull-down drivers with resistive or current source pullups. This protocol allows multiple devices to drive and monitor the bus without bus contention. The simplicity of resistive or fixed current source pull-ups is offset by the slow rise times resulting when bus capacitance is high. Rise times can be improved by using lower pull-up resistor values or higher fixed current source values, but the additional current increases the low state bus voltage, decreasing noise margins. Slow rise times can seriously impact data reliability, enforcing a maximum practical bus speed well below the established I2C or SMBus maximum transmission rate. The LTC4311 overcomes these limitations by providing a boosted pull-up current only during positive bus transitions to quickly slew large bus capacitances. Therefore, rise time is dramatically improved, especially with maximum or out of specification I2C or SMBus loading conditions. The LTC4311 has separate but identical circuitry for each BUS output pin. The circuitry consists of a positive edge slew rate detector and a voltage comparator. The voltage comparator has a supply dependent threshold. At supply voltages below 2.7V the comparator threshold is 0.3VCC, and at higher voltages the comparator threshold is a constant 0.8V. This allows the rise time accelerator to be used in non-compliant systems where the bus thresholds are optimized for low voltage operation, while still meeting standard thresholds for compliant I2C and SMBus systems. The slew limited pull-up current is only turned on if the bus line voltage is greater than the supply dependent comparator threshold voltage and the positive slew rate of the bus line is greater than the typical 0.2V/s threshold of the slew rate detector. The pull-up current remains on until the voltage on the bus line is within 0.4V of VCC or the slew rate drops below 0.2V/s. The pull-up current is slew limited to maintain signal integrity for busses that have very little capacitive load. In a lightly loaded system a strong pull-up could result in fast edge rates that cause reflections on the bus. These reflections can be detected by devices on the bus as extra clock edges, could result in erroneous data, or cause a stuck bus. An internal slew limit comparator limits the rate the pull-up current can slew the bus lines to 100V/s. Auto Detect Standby Mode and Shutdown Mode When BUS1 and BUS2 are both high the LTC4311 reduces the standby supply current. Internal comparators detect when the bus pins are within 400mV of VCC, and reduce the supply current to 26A. When the ENABLE pin is grounded, the LTC4311 enters a low (<5A) supply current shutdown mode. Both bus pins are high impedance in shutdown, regardless of the bus pin voltage.
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LTC4311 APPLICATIONS INFORMATION
Selecting the values of RS and RP The typical configuration for the data bus for a 2-wire bus is shown in Figure 1. The parameters RP and RS should be chosen carefully. A description of the process for choosing the values of RP and RS follows. An external pull-up resistor RP is required in each bus line to supply a steady state pull-up current if the bus is at logic zero. This pull-up current is used for slewing the bus line during the initial portion of the positive transition in order to activate the LTC4311 pull-up current. Using an external pull-up resistor RP to supply steady state pull-up current provides the freedom to adjust rise time versus fall time as well as defining the low state logic-level (VOL). For I/O stage protection from ESD and high voltage spikes on the bus, a series resistor RS (Figure 1) is sometimes added to the open drain driver of the bus agents.
VCC LTC4311 DYNAMIC CURRENT PULL-UP CBUS RP Bus RS
Low State Noise Margin A low value of VOL, the low state logic level, is desired for good noise margin. VOL is calculated as follows: VOL = RL * VCC RL + RP (1)
RL is the series sum of RS and RON, the on resistance of the open-drain driver. Increasing the value of RP decreases the value of VOL. Increasing RL increases the value of VOL. Initial Slew Rate The initial slew rate, SR, of the bus is determined by: SR = VCC - VOL RP * CBUS
(2)
SR must be greater than SRTHRESH, the LTC4311 slew rate detector threshold (0.5V/s max), in order to activate the pull-up current. I2C Rise and Fall Time Rise time of an I2C line is derived using equation 3. tr = - Rp * CBUS * VIHMIN - VCC - Rp *IPULLUP AC ln VILMAX - VCC - Rp *IPULLUP AC
DATA IN DATA OUT RON
(3)
4311 F01
Fall time of an I2C line is derived using equation 4. VIHMIN *(RP + RL ) - RL V t f = R T * CBUS * ln CC VILMAX *(RP + RL ) - RL VCC (4) where RT is the parallel equivalent of RP and RL.
Figure 1. Typical 2-Wire Bus Configuration
Both the values of RP and RS must be chosen carefully to meet the low state noise margin and all bus timing requirements. A discussion of the electrical parameters affected by the values of RS and RP, as well as the general procedure for selecting the values of RS and RP follows.
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LTC4311 APPLICATIONS INFORMATION
For an I2C system with fixed input levels, VILMAX = 1.5V and VIHMIN = 3V. For I2C systems with VCC related input levels, VILMAX = 0.3VCC and VIHMIN = 0.7VCC. CBUS is the total capacitance of the I2C line. A general procedure for selecting RP and RL is as follows: 1. RL is first selected based on the I/O protection requirement. Generally, an RS of 100 is sufficient for high voltage spikes and ESD protection. RON is determined by the size of the open-drain driver, a large driver will have a lower RON. 2. The value of RP is determined based on the VOL and minimum slew rate requirements. The VOL will determine the smallest resistance value that can be used in a system, and the minimum slew requirement will bound the resistance on the upper end. Generally the largest value of resistance that meets the minimum slew rate with some margin will be selected. 3. For I2C systems incorporating the LTC4311, the rise times are met under most loading conditions, due to the strong accelerator current. The pull-down drivers are typically low impedance, and therefore fall times are not generally an issue. Rise and fall time requirements must be verified using equations 3 and 4 (for an I2C system) or equations 5 to 8 (for an SMBus system). The value chosen for RP must ensure that both the rise and fall time specifications are met simultaneously. I2C Design Example Given the following conditions and requirements: VCC = 3.3V NOMINAL VOL = 0.4V MAXIMUM CBUS = 600pF VILMAX = 0.99V,VIHMIN = 2.31V tr = 0.3s MAXIMUM,t f = 0.3s MAXIMUM (8) For an SMBus system, VILMAX = 0.8V and VIHMIN = 2.1V. CBUS is the total bus capacitance of the SMBus line. (9) If an RS of 100 is used and the max RON of the driver is 200, then RL = 200 + 100 = 300. Use equation 1 to find the required RP to meet VOL. 300*(3.3V - 0.4V) 0.4V RP = 2.175k RP =
SMBus Rise and Fall Time Rise time of a SMBus line is derived using equations 5, 6 and 7. tr = t 1 + t 2 (5) t1 is the time from when the bus crosses the lower slew rate measurement point, until the bus reaches VTHR and the accelerators fire. The time from when the accelerators fire until the bus reaches the upper slew rate measure point is given by t2. Equations for t1 and t2 are given here: VTHR - VCC t1 = -RP * CBUS * ln VILMAX - 0.15V - VCC If (VILMAX - 0.15V) > VTHR, then t1 = 0 t 2 = -RP * CBUS * V + 0.15V - VCC - RP *I PULLUPAC ln IHMIN VTHR - VCC - RP *IPULLUP AC (7) Fall time of an SMBus line is derived using equation 8: t f = R T * CBUS * VIHMIN + 0.15V * (RP + RL ) - RL VCC ln V - 0.15V ILMAX * (RP + RL ) - RL VCC
(6)
(10)
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LTC4311 APPLICATIONS INFORMATION
This is the lowest resistor value that may be chosen and still meet VOL. Next calculate the largest value of RP that will satisfy SR, the minimum slew rate requirement. Using VOL = 0.4V and SR = 0.5V/s calculate the value of RP with equation 2. 3.3V - 0.4V 600pF *0.5V / s RP = 9.667k RP = (11) This is approximately the largest value of RP that will satisfy the minimum slew rate requirement. Since RP is larger than 2.175k the VOL will be below 0.4V, and the slew rate will actually be faster than calculated. Choosing RP = 10k , VOL and SR are recalculated. 300*3.3V = 96mV 300 +10k 3.3V - 96mV SR = = 0.534V / s 10k*600pF VOL = (12) The rise and fall times need to be verified using equations 3 and 4. tr = -10k * 600pF * 2.31V - 3.3V - 10k * 2.5mA In = 0.297s 0.99V - 3.3V - 10k * 2.5mA t f = 291 * 600pF * (13) SMBus Design Example Given the following conditions and requirements for a low power SMBus system: VCC = 3.3V NOMINAL VOL = 0.4V MAXIMUM CBUS = 400pF VILMAX = 0.8V,VIHMIN = 2.1V tr = 1s MAXIMUM,t f = 0.3s MAXIMUM (15) If an RS of 100 is used and the max RON of the driver is 200, then RL = 200 + 100 = 300. Use equation 1 to find the required RP to meet VOL. 300*(3.3V - 0.4V) 0.4V RP = 2.175k RP = Calculate Maximum RP from equation 2. 3.3V - 0.4V 400pF *0.5V / s RP = 14.5k RP = (17) Choose RP = 13k and recalculate VOL and SR. 300 * 3.3V = 74mV 300 + 13k 3.3V - 74mV SR = = 0.62V / s 13k * 400pF VOL =
(16)
2.31 3.3V *(10k + 300) - 300 In = 0.158s 0.99V *(10k + 300) - 300 3.3V (14) Both the rise and fall times meet the 0.3s I2C requirement and the VOL is satisfied, while meeting the minimum slew rate requirement, so RP is chosen to be 10k. If tr is not met, RP should be decreased and if tf is not met then RP should be increased.
(18)
The rise and fall times need to be verified using equations 5 to 8. t1 = -13k * 400pF * 0.9V-3.3V ln = 0.515s 0.8V-0.15V-3.3V (19)
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LTC4311 APPLICATIONS INFORMATION
t 2 = -13k * 400pF * 2.1V + 0.15V - 3.3V - 13k * 2.5mA In = 0.205s 0.9V - 3.3V - 13k * 2.5mA (20) tr = t1 + t 2 = 0.515s + 0.205s = 0.72s (21) t f = 293 * 400pF * 2.1V + 0.15V * (13k + 300) - 300 3.3V In 0.8V - 0.15V * (13k + 300) - 300 3.3V = 0.156s high) at the end of the last bit sent and the slave device pulling the SDA line low before the rising edge of the ACK clock pulse. The LTC4311 5mA pull-up current is activated when the host releases the SDA line, allowing the voltage to rise above the LTC4311's comparator threshold (VTHR). If a slave device has a high value of RS, a longer time is required for the slave device to pull SDA low before the rising edge of the ACK clock pulse. To ensure sufficient data setup time for ACK, slave devices with high values of RS should pull the SDA low earlier. An alternative is the slave device can hold the SCL line low until the SDA line reaches a stable state. Then, SCL can be released to generate the ACK clock pulse. (22) Multiple LTC4311s in Parallel In very heavily loaded systems, stronger pull up current may be desired. Two LTC4311's may be used in parallel to increase the total pull up current to meet rise time requirements. Notes on Using the LTC4311 in LTC1694 Applications Although the LTC1694 and LTC4311 are functionally similar accelerators for I2C, SMBus, and other comparable open drain/collector bus applications, the LTC4311 offers a lower power, higher performance solution in a smaller package as compared to the LTC1694. These and other differences are listed in Table 1 and must be accounted for if using the LTC4311 in LTC1694 applications.
The rise time meets the 1s SMBus requirement and the fall time meets the 0.3s requirement. The VOL is satisfied while meeting the minimum slew rate requirements, so RP is chosen to be 13k. If the rise time was not met due to a large t1, equation 6 can be used to calculate a maximum value of RP that will meet the rise time requirements. ACK Data Setup Time Care must be taken in selecting the value of RS (in series with the pull-down driver) to ensure that the data setup time requirement for ACK (acknowledge) is fulfilled. An acknowledge is the host releasing the SDA line (pulling
Table 1. Differences Between LTC1694 and LTC4311
SPECIFICATION Enable Pin (typ) VCC ICC (typ), BUS1, BUS2 High VTHRES (typ) IPULL-UP (typ) fMAX LTC1694 N/A 2.7V - 6V 60A 0.65V 2.2mA 100kHz LTC4311 1V 1.6V - 5.5V 26A Dependent on VCC 5mA 400kHz COMMENTS Allows the LTC4311 to be Disabled, Consuming Less than 5A Lower Operating Supply Voltage for Low Voltage Systems Lower Standby Current to Conserve Power Tighter, Higher Noise Margins and Improved Rise Times Stronger Slew-Limited Source Current for Slewing Higher Bus Capacitances Higher Operating Frequency for I2C's Fast Mode Bus Specification
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LTC4311 PACKAGE DESCRIPTION
DC Package 6-Lead Plastic DFN (2mm x 2mm)
(Reference LTC DWG # 05-08-1703)
R = 0.115 TYP 0.56 0.05 (2 SIDES) 2.00 0.10 (4 SIDES) PIN 1 CHAMFER OF EXPOSED PAD 3 0.25 0.05 0.50 BSC 1.42 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 0.200 REF 0.75 0.05 1
(DC6) DFN 1103
0.38 0.05 4 6
0.675 0.05 2.50 0.05 1.15 0.05 0.61 0.05 (2 SIDES) PACKAGE OUTLINE
PIN 1 BAR TOP MARK (SEE NOTE 6)
0.25 0.05 0.50 BSC
1.37 0.05 (2 SIDES) 0.00 - 0.05 BOTTOM VIEW--EXPOSED PAD
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
SC6 Package 6-Lead Plastic SC70
(Reference LTC DWG # 05-08-1638 Rev B)
0.47 MAX
0.65 REF
1.80 - 2.20 (NOTE 4)
1.00 REF
2.8 BSC 1.8 REF
1.80 - 2.40 1.15 - 1.35 (NOTE 4)
INDEX AREA (NOTE 6)
PIN 1
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.10 - 0.40
0.65 BSC
0.15 - 0.30 6 PLCS (NOTE 3)
0.80 - 1.00 0.00 - 0.10 REF 1.00 MAX GAUGE PLANE 0.15 BSC 0.26 - 0.46
NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
0.10 - 0.18 (NOTE 3)
SC6 SC70 1205 REV B
5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE INDEX AREA 7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70 8. JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC4311 TYPICAL APPLICATION
Application Utilizing Low Current Shutdown
VCC 2.5V VCC C1 0.01F OFF ON ENABLE GND I2C SCL SDA CLK IN CLK OUT DEVICE 1 DATA IN DATA OUT CLK IN CLK OUT DEVICE N
4311 TA02
LTC4311 BUS1
VCC 2.5V
R1 10k BUS2
R2 10k
DATA IN DATA OUT
RELATED PARTS
PART NUMBER LTC1380/LTC1393 LTC1427-50 LTC1623 LTC1663 DESCRIPTION COMMENTS Single-Ended 8-Channel/Differential 4-Channel Analog Low RON: 35 Single-Ended/ 70 Differential, Expandable to 32 Single or 16 Differential Channels MUX with SMBus Interface Micropower, 10-Bit Current Output DAC with SMBus Interface Dual High Side Switch Controller with SMBus Interface SMBus Interface 10-Bit Rail-to-Rail Micropower DAC Precision 50A +/- 2.5% Tolerance Over Temperature, 4 Selectable SMBus Addresses, DAC Powers Up at Zero or Midscale 8 Selectable Addresses/16 Channel Capability DNL < 0.75 LSB Max, 5-Lead SOT-23 Package Improved SMBus/I2C Rise-Time, Ensures Data Integrity with Multiple SMBus/I2C Devices 1.25A, 200kHz, Floating or Grounded Lamp Configurations 0.75 PMOS 180mA Regulator, 6-Bit DAC Two 100A 8-Bit DACs, two Tach Inputs, Four GPIO -1: Bus Buffer with READY, ACC and ENABLE -2: Dual Supply Bus Buffer with READY and ACC -3: Dual Supply Bus Buffer with READY and ENABLE Allows Bus Pull-Up Voltages as Low as 1V on SDAIN and SCLIN Address Expansion, GPIO, Software Controlled Provides Automatic Clocking to Free Stuck I2C Busses 2 or 4 Selectable Downstream Buses, Stuck Bus Disconnect, Rise Time Accelerators, Fault Reporting, +/- 10kV HBM ESD Tolerance 60mV Buffer Offset with 30ms Stuck Bus Timeout
LTC1694/LTC1694-1 SMBus Accelerator LT1786F LTC1695 LTC1840 LTC4300A-1/ LTC4300A-2/ LTC4300A-3 LTC4301 LTC4301L LTC4302-1/ LTC4302-2 LTC4303/4 LTC4305/6 LTC4307 SMBus Controlled CCFL Switching Regulator SMBus/ I2C Fan Speed Controller in ThinSOTTM Dual I2C Fan Speed Controller Hot Swappable 2-Wire Bus Buffers
Supply Independent Hot Swappable 2-Wire Bus Buffer Supply Independent Hot Swappable 2-Wire Bus Buffer with Low Voltage Level Translation Addressable 2-Wire Bus Buffer Hot Swappable 2-Wire Bus Buffers with Stuck Bus Recovery 2 or 4-Channel, 2 Wire Bus Multiplexers with Capacitance Buffering Low Offset Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery
ThinSOT is a trademark of Linear Technology Corporation
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